SC503, v1.0, Circuit Explained

The SC503, Z180 Processor card includes the following:

  • Z180 CPU running at 18.432 MHz
  • One 512k byte static RAM chip
  • One 512k byte Flash ROM chips
  • Two 5 volt FTDI style asynchronous serial ports
  • One 5 volt SPI / SD Card ports
  • Clock oscillator (18.432 MHz)

C1 to C7

These capacitors provide power supply decoupling (or bypass). The fast switching in digital circuits creates spikes on the power supply lines which are suppressed with decoupling capacitors placed at key points on the circuit board.

The exact value of this component is not critical. The use of very cheap capacitors within the range of about 30 to 200 nF is acceptable.

JP1

Jumper 1 allows Flash chip U1’s write enable input to be connected to either Vcc (5 volts) or the CPU’s write output (/WR).

When the Flash chip’s write enable input is connected to Vcc, the Flash chip will never get a write enable signal and thus the memory is protected against being changed. When connected to the CPU’s write output, it is possible to write to the Flash chip.

Writing to the Flash chip is unlikely to happen by accident due to the software requirements. However, for peace of mind it is generally best to disable writing with this jumper.

JP2

Fit a jumper shunt here to connect the Z180’s interrupt #1 (/INT1) signal to the Z50Bus USER 1 pin. Removing this jumper shunt isolates the USER 1 pin, freeing it for other modules to use for a different function.

JP3

Fit a jumper shunt here to connect the Z180’s interrupt #2 (/INT2) signal to the Z50Bus USER 2 pin. Removing this jumper shunt isolates the USER 2 pin, freeing it for other modules to use for a different function.

LED1

This LED is used to indicate the presence of the 5 volt supply and also other status information. At reset the LED is turned on by a hardware reset but after that it is software controlled.

P1 and P2

These connectors give access to the 5 volt SPI port. This port uses the Z180’s hardware clocked serial I/O for high speed interfacing.

PinFunction
1Chip select (active low)
2Clock
3Master out, slave in
4Master in, slave out
5Vcc (5V)
6Ground (GND)

Two sets of mounting holes are provided. This allows both a male and a female header to be fitted. The female header enables the Micro SD adapter to be directly connected to SC503, while the male header enables the Micro SD card adapter to be placed away from the SC503 using a 6-way female to female Dupont cable.

P3 and P4, and P7 and P8

These enable SC503’s Vcc (5 V) to be connected to serial ports A and B power pins. Typically, this allows the system to be powered from an FTDI style serial adapter.

WARNING: You should normally only connect one power source to the system, at any time.

As power can flow either way, these jumpers (or switches) also enable serial devices to be powered from SC503. If such devices are used, fit a jumper shunt in the appropriate position.

Two sets of mounting holes are provided for each serial port.

P5 and P6, and P9 and P10

Serial ports A and B are connected via P5 or P6, and P9 or P10 respectively. These are FTDI style 5 volt serial ports. Port A includes RTS/CTS flow control signals, while port B does not.

PinFunction
1Ground (GND)
2Request To Send (RTS) output from Z180
3Vcc (5V)
4Recieve Data (RxD) input to Z180
5Transmit Data (TxD) output from Z180
6Clear To Send (CTS) input to Z180

Two sets of mounting holes are provided for each port. This allows both a male and a female header to be fitted.

P11

This is a 2 row by 25 pin male header for connection to a Z50Bus backplane.

R1 to R6

These provide current limiting between the Z180 system and the serial devices on serial ports A and B, providing protection for when one is powered and the other is not.

R7 to R9

The resistors provide pull up and pull down for the serial port inputs, thus holding them in known states when no device is connected.

R10

This resistor pulls up the SPI port’s MISO line. Some SPI slave devices drive the MISO line both high and low, while others only drive it low (open collector). This resistor is required to pull the MISO line high when a device is not driving it low.

R11

This is a current limiting resistor for the LED. 1000 ohms should give reasonable brightness, but higher or lower values can be used if required.

RP1

The resistor network (or resistor pack) provides 8 resistors to pull up processor signals that may either not always be connected to external devices, or are connected to devices that have open collector outputs. Open collector outputs only drive the signal low when active, but do not drive the signal high when inactive. These signals are left ‘floating’ when not active and thus need pull-up resistors to pull the signal to its inactive state (high).

U1

This is a 512k byte Flash memory chip. This holds the board’s firmware, typically RomWBW.

U2

This is a 512k byte static RAM chip. This is used to store the program and data being worked on at the current time.

U3

The 74AHCT139 is the addresses decoder, providing chip enable signals for the two memory chips and for the I/O devices. It is a dual 2-to-4 line decoder. One decoder is used to select between the RAM and the Flash memory. The other forms part of the address decoding for input/output devices.

Memory: Inputs are memory request (MREQ) and A19. Memory request is low when memory is being accessed and A19 determines if it is Flash memory (A19 low) or RAM (A19 high).

Input/output: This provides two output device enable signals (active low). One of the outputs is low when a write is being performed to the input/output address 0x0C, the other when a write is being performed to the input/output address 0x0E. Address 0x0C is used to control the SPI / SD card’s enable signal latch (U6.2). Address 0x0E is used to control the status LED latch (U6.1).

U4

This is a 68-pin PLCC packaged Z8S180 CPU. It must be rated at a frequency at least as high as the clock signal PHI.

PHI is initially the on-board oscillator (X1) frequency divided by 2, as the Z180 turns on its clock divider on at reset. However, current firmware turns this off, so PHI is then equal to the on-board oscillator (X1) frequency.

U5

This is a 74HCT688 8-bit identity comparator. The output of this devices goes low when a write is being performed to an input/output device address 0000 11X0 binary. This signal is used to enable the input/output half of U3.

U6

This is a dual D-type flip flop which is used to provide the software controlled output bits. One is the SPI / SD card enable signal, the other controls the status LED.

The flip-flop latches the state of the ‘D’ input when the clock input rises. The latched state is output on the ‘Q’ pin. The ‘D’ input is a data bus signal, while the clock input is the address decoded chip select line. The result being that a data write to the appropriate output port address causes the data bit to be stored in the flip-flop latch and output to the SPI / SD card enable or the LED. Thus the SPI / SD card enable and the LED state can be controlled by simple I/O writes in software.

The flip-flop latches are set low by a hardware reset, resulting in the SPI / SD card being enabled and the LED being turned on.

X1

This oscillator provides the CPU’s main clock. With existing firmware this oscillator is also used as a clock source for the serial ports. Typically this oscillator is 18.432 MHz. This is the frequency required when running the card with current firmware..

Homebrew 8-bit retro computing